1. Field of the Invention
The present invention relates to a technique for etching an interlayer insulating film formed on a substrate.
2. Description of the Related Art
A process for manufacturing a semiconductor device includes a process (such as a dual damascene process) for forming a structure with multiple layers each having a wiring on a semiconductor wafer (hereinafter merely referred to as a wafer), which is a substrate. In the dual damascene process, a recessed portion including a hole (via hole) and a trench is formed in an interlayer insulating film. An electrical connection portion (via) is embedded in the via hole and serves to connect a wiring provided in an upper layer with a wiring provided in a lower layer. The trench is provided to embed the wiring provided in the upper layer. Copper for wiring is embedded in the recessed portion. After that, unnecessary copper embedded in the recessed portion is removed by chemical mechanical polishing (CMP) to form a circuit portion for a single layer.
The following film is known as the interlayer insulating film. That is, a low dielectric constant film (hereinafter referred to as a SiOCH film) contains silicon, oxygen, carbon and hydrogen and has a relative dielectric constant k as small as 2.0 to 3.2. A cap film containing SiO2 or the like is formed immediately on the interlayer insulating film in order to improve adhesion of the interlayer insulating film to a sacrificial film or the like, which is present on the upper side of the interlayer insulating film or to protect the interlayer insulating film during the CMP in a post-process.
Some of integrated circuit chips, which are semiconductor devices, each have a via hole provided outside a region in which a circuit is present. Such a via hole is provided to confirm electrical characteristics and called a Kelvin via hole or Kelvin contact. The Kelvin via hole is mainly used to evaluate characteristics of a via hole present in the entire circuit by measuring electrical resistance of the integrated circuit after formation of the integrated circuit. In addition, The Kelvin via hole can be used to evaluate whether or not the via hole present in the circuit region of the chip is reliably formed.
The arrangement density of the Kelvin via hole is considerably small, for example, one tenth the arrangement density of typical via holes provided in the integrated circuit or less (refer to FIG. 5). It has been reported that during a process for forming the via hole after the cap film is etched, the etching operability for forming the Kelvin via hole is degraded (Non-Patent Document 1: Momonoi, Y., Yonekura, K. and Izawa, M., “Investigation of reduction in etch rate of isolated holes in SiOCH” in Proc. Dry Process International Symposium 2-03, pp. 7-8). In such a case, the via hole may not extend to a metal wiring included in the lower layer. When the etching is performed for a longer period of time to prevent the etching for forming the Kelvin via hole from being stopped, a region corresponding to the typical via hole may be excessively etched, resulting in a larger via hole or unnecessary etching to the metal wiring provided in the lower layer.
As described above, the operability for etching a portion of the interlayer insulating film present in a region corresponding to the typical via hole is different from that for etching a portion of the interlayer insulating film present in a region corresponding to the Kelvin via hole when the etching is performed under the same conditions. The inventors estimate that the difference between the etching operability for forming the two types of via holes results from a difference between concentrations of water present around an upper surface of the interlayer insulating film. A description will be made of an estimated mechanism for causing the difference between the etch rates with reference to FIGS. 6(a) and (b).
FIGS. 6(a) and 6(b) are cross sectional views of a semiconductor device 100 before and during etching. In FIGS. 6(a) and 6(b), reference numeral 101 denotes an interlayer insulating film; 102, a cap film; 104, a photoresist film having a mask pattern in which a typical via hole 111 and a Kelvin via hole 110 are formed; and 103, an upper layer film including the cap film 102, the photoresist film 14 and another film.
The interlayer insulating film 101 is formed of a low dielectric constant material such as a SiOCH film and has a high hygroscopic property. The cap film 102 is formed of a SiO2 film and has a high hygroscopic property. Especially, the SiO2 film formed of an organic liquid such as TEOS (tetraethyl orthosilicate) or the like has a high hygroscopic property. Even during sequential formation of the interlayer insulating film 101 and the cap film 102 in a multi-chamber system having a vacuum transfer chamber with multiple chemical vapor deposition (CVD) apparatuses provided in the chamber, the interlayer insulating film 101 and the cap film 102 absorb a small amount of water present in the vacuum transfer chamber due to the respective hygroscopic properties. Recently, a resist having multiple layers is under consideration in order to efficiently perform the dual damascene process for embedding a copper wiring. If the multi-layer resist is used, the wafer is removed from the vacuum transfer chamber in the process for stacking the upper layer film 103 on the cap film 102, and transferred in the atmosphere to ensure a spin coated film is formed by means of spin coating in the atmosphere in some cases. In this case, a large amount of wafer is absorbed by the cap film 102. In addition, a portion of the interlayer insulating film 101, which is present on an end portion of the wafer W, is not covered with the cap film 102. When the portion of the interlayer insulating film 101, which is not covered with the cap film 102, is in contact with the atmosphere, the interlayer insulating film 101 may directly absorb water present in the atmosphere. It is considered that the water is maintained in the state of H2O molecules or OH groups in the cap film 102 or the interlayer insulating film 101. In the case where the water is maintained in the state of OH groups, water molecules are coupled with Si atoms contained in the SiOCH film constituting the interlayer insulating film 101 to generate the OH groups. Hereafter, the H2O molecules and OH groups are collectively called moisture.
As described above, moisture is absorbed by the interlayer insulating film 101 or the cap film 102 during the process or between the processes. In the process for forming a via hole in the interlayer insulating film 101, a portion of the cap film 102 is etched to expose a portion of the upper surface of the interlayer insulating film 101. After the exposure of the portion of the upper surface of the interlayer insulating film 101, moisture contained in the interlayer insulating film 101 gather around the typical via hole 111 and the Kelvin via hole 110 since the moisture attempts to disperse into the vacuum atmosphere. This may result from the fact that moisture directly absorbed by the interlayer insulating film 101 gather around the boundary between the cap film 102 and the interlayer insulating film 101 and moisture contained in the cap film 102 diffuse to the interlayer insulating film 101 and gather around the boundary between the cap film 102 and the interlayer insulating film 101 (refer to FIG. 6(a)).
Since the density of the typical via holes is high, the moisture can easily disperse into the vacuum atmosphere through the via holes 111. On the other hand, a large amount of the moisture gathers around each of the Kelvin via holes since the density of the Kelvin via holes is low.
For the abovementioned reason, the density of the moisture present around the upper surface of the interlayer insulating film 101 located under each of the Kelvin via holes 110 is much higher than that of the moisture present around the upper surface of the interlayer insulating film 101 located under each of the typical via holes 111. The large amount of the moisture is reacted with an etchant (active species) to inactivate the etchant, resulting in prevention of the progress of the etching. It is therefore considered that the prevention of the etching progress causes to degrade the operability for etching portions of the interlayer insulating film 101 present in the regions corresponding to the Kelvin via holes 110. In addition, it is considered that the etchant is inactivated by H2O molecules. The present inventors, however, consider the following mechanism as the cause of the inactivation of the etchant. That is, H2O molecules contained in the interlayer insulating film 101 are directed to and gather under each of the via holes 111. In this case, a portion of the interlayer insulating film 101 present under each of the via holes is exposed to plasma during the etching or the like. As a result, the bonds of molecules contained in the SiOCH film may be broken, and a large number of dangling bonds of Si atoms may be produced. When H2O molecules gather under the above condition, the H2O molecules are coupled with the dangling bonds of the Si atoms to form a large number of OH groups. It is considered that the key factor of inactivation of the etchant is the OH groups formed in the abovementioned way.
Non-Patent Document 1 has reported the comparison of a rate of etching a SiOCH film in the case where the SiOCH film is exposed to the atmosphere for a day after the formation of the film and a rate of etching a SiOCH film in the case where the SiOCH film is exposed to the atmosphere for a month after the formation of the film. Based on the report, the rate of etching the SiOCH film exposed to the atmosphere for a month is smaller than that of etching the SiOCH film exposed to the atmosphere for a day. In addition, the etching operability for forming a via hole is degraded in the SiOCH film exposed to the atmosphere for a month. The report describes that the degradation of the etching operability is caused by the difference between the amounts of moisture contained in the SiOCH film for the abovementioned periods of time. The abovementioned experimental results and consideration of the results confirm the abovementioned estimated mechanism in which the degradation of the etching operability for forming the Kelvin via hole is caused by moisture contained in the interlayer insulating film 101.